FPGA Central

World's 1st FPGA Portal

		FPGA Groups > NewsGroup > FPGA
CPU address to OCM address translation

FPGA comp.arch.fpga newsgroup (usenet)

LinkBack

Thread Tools

Display Modes

#1 (permalink)

06-28-2005, 03:25 PM

[email protected]

Guest

Posts: n/a

CPU address to OCM address translation

How exactly does the address translate to an OCM address?
I can't really find anything solid on the matter and I looked at the
values of the DSARC register and but I couldn't really find any
connection between that value and my CPU OCM addresses.
I know the upper 8 bits are not used, bit I didn't understand why the
lower 2 bits are discarded, is this for 32 bit alignment?

Thanks in advance

Jim

Bookmarks

« FPGA PC104 development board | good bye nios (o; »

Posting Rules
You may not post new threads You may not post replies You may not post attachments You may not edit your posts BB code is On Smilies are On [IMG] code is On HTML code is Off Trackbacks are On Pingbacks are On Refbacks are On Forum Rules

Similar Threads
Thread	Thread Starter	Forum	Replies	Last Post
Decoupled Address and Data Bus	lifez@sinewave	Verilog	1	03-10-2008 01:42 PM
RAM Address Calculating	Marco	FPGA	2	03-04-2005 05:38 PM
DDR Error : partial row address regardless	seyior	FPGA	2	12-13-2004 06:26 AM
Comparator and minimum value address	sunil	FPGA	4	02-22-2004 08:10 PM

All times are GMT +1. The time now is 12:00 PM.