FPGA Central

The MAX II can tolerate 3.3V input, I believe. I read some TTL data sheets
but they seem all provide typical VOH(3.1V) and minimal VOH(2.4V) only. The
max VOH is usually not provided. Could I drive the CPLD i/o pins directly,
with the LSTTL outputs?

I will try to use some LVTTL to interface the CPLD, if LSTTL are not
qualified. Thank you.

vax, 9000

vax, 9000 wrote:

> The MAX II can tolerate 3.3V input, I believe. I read some TTL data sheets
> but they seem all provide typical VOH(3.1V) and minimal VOH(2.4V) only.
> The max VOH is usually not provided. Could I drive the CPLD i/o pins
> directly, with the LSTTL outputs?
OK, since nobody answered this question, I did a small experiment. I tested
VOH of three TTL chips, F(airchild)74LS244, EL74LS14, DS8835. Vcc is 5.07V.
Without load, the outputs are around 6.2V(strange?), 5.0V and 5.0V. With a
10K pull-down resistor, the outputs are around 3.5V, 3.5V, 3.5V. I used a
digital multimeter(means high input resistance).

So the answer is no, unless a serial resistor is used, and the input diode
(in EPM1270, EPM2210) is enabled.

vax, 9000

>
> I will try to use some LVTTL to interface the CPLD, if LSTTL are not
> qualified. Thank you.
>
> vax, 9000

vax, 9000 wrote:
> vax, 9000 wrote:
>
>
>>The MAX II can tolerate 3.3V input, I believe. I read some TTL data sheets
>>but they seem all provide typical VOH(3.1V) and minimal VOH(2.4V) only.
>>The max VOH is usually not provided. Could I drive the CPLD i/o pins
>>directly, with the LSTTL outputs?
>
> OK, since nobody answered this question, I did a small experiment. I tested
> VOH of three TTL chips, F(airchild)74LS244, EL74LS14, DS8835. Vcc is 5.07V.
> Without load, the outputs are around 6.2V(strange?), 5.0V and 5.0V. With a
> 10K pull-down resistor, the outputs are around 3.5V, 3.5V, 3.5V. I used a
> digital multimeter(means high input resistance).
>
> So the answer is no, unless a serial resistor is used, and the input diode
> (in EPM1270, EPM2210) is enabled.

Where did you find the 3.3V MAX value ?
The data I have gives 4V (DC)-4.5V (10% duty cycle) ?
On that basis, you would just need to enable the input diode, and from
your numbers, draw < 300uA clamping current.

You WILL need to stick to bipolar output structures, and avoid CMOS
which may be dangerous in the long term.
-jg

Jim Granville wrote:

> vax, 9000 wrote:
>> vax, 9000 wrote:
>>
>>
>>>The MAX II can tolerate 3.3V input, I believe. I read some TTL data
>>>sheets but they seem all provide typical VOH(3.1V) and minimal VOH(2.4V)
>>>only. The max VOH is usually not provided. Could I drive the CPLD i/o
>>>pins directly, with the LSTTL outputs?
>>
>> OK, since nobody answered this question, I did a small experiment. I
>> tested VOH of three TTL chips, F(airchild)74LS244, EL74LS14, DS8835. Vcc
>> is 5.07V. Without load, the outputs are around 6.2V(strange?), 5.0V and
>> 5.0V. With a 10K pull-down resistor, the outputs are around 3.5V, 3.5V,
>> 3.5V. I used a digital multimeter(means high input resistance).
>>
>> So the answer is no, unless a serial resistor is used, and the input
>> diode (in EPM1270, EPM2210) is enabled.
>
> Where did you find the 3.3V MAX value ?
> The data I have gives 4V (DC)-4.5V (10% duty cycle) ?
> On that basis, you would just need to enable the input diode, and from
> your numbers, draw < 300uA clamping current.
I think you are right. I didn't read the datasheet carefully. Now I find
that the clamping diodes only exist within i/o bank 3, and there is
power-up sequence restriction too. Another problem is that I failed to find
the allowed clamping diode current.

vax, 9000

>
> You WILL need to stick to bipolar output structures, and avoid CMOS
> which may be dangerous in the long term.
> -jg