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Old 01-05-2004, 06:26 AM
Johan Bernspång
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Default connecting tristates

Hi,

Currently I'm working on a OPB to ISA bridge to be included as a peripheral
in a Microblaze system. To verify that the bridge works, I've also made a
GPIO that is connected as a peripheral on the ISA bus. The ISA data bus is
bidirectional and is thus implemented as a tristate port. Since the data
port on the ISA GPIO also is bidirectional, that is also implemented as a
tristate. The problem is that when the two tristate signals are connected in
the system.mhs file (data = isa_sd) XST interprets that to connect the
isa_sd_i with data_i, isa_sd_o with data_o, and isa_sd_t with data_t. I have
also tried to separate the data ports on the GPIO side, but I haven't worked
out how to specify that isa_sd_o should be connected to data_i and isa_sd_i
to data_o.

Does anyone with more experience on this matter than me have any good
suggestions on how to solve the problem?

Johan


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Old 01-06-2004, 12:43 AM
Paulo Dutra
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Default Re: connecting tristates

You can use SR 16636 as a starting point.
http://support.xilinx.com/techdocs/16636.htm

Once you have the INOUT port broken out to
the individual _T, _I, and _O ports in the MPD.

You can then assign these ports in the MHS.

BEGIN isa_gpio
PORT isa_sd_o = data_i
PORT isa_sd_i = data_o
END

BEGIN opb_gpio
PORT GPIO_I = data_i
PORT GPIO_O = data_o
END


Johan Bernspång wrote:
> Hi,
>
> Currently I'm working on a OPB to ISA bridge to be included as a peripheral
> in a Microblaze system. To verify that the bridge works, I've also madea
> GPIO that is connected as a peripheral on the ISA bus. The ISA data busis
> bidirectional and is thus implemented as a tristate port. Since the data
> port on the ISA GPIO also is bidirectional, that is also implemented asa
> tristate. The problem is that when the two tristate signals are connected in
> the system.mhs file (data = isa_sd) XST interprets that to connect the
> isa_sd_i with data_i, isa_sd_o with data_o, and isa_sd_t with data_t. Ihave
> also tried to separate the data ports on the GPIO side, but I haven't worked
> out how to specify that isa_sd_o should be connected to data_i and isa_sd_i
> to data_o.
>
> Does anyone with more experience on this matter than me have any good
> suggestions on how to solve the problem?
>
> Johan
>
>




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\ \ ` Xilinx [email protected]
/ / 2100 Logic Drive http://www.xilinx.com
\_\/.\ San Jose, California 95124-3450 USA

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