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-   -   Conflict found between ActiveHDL6.1 and ModelSim SE (http://www.fpgacentral.com/group/showthread.php?t=49957)

Jay 08-05-2003 09:04 AM

Conflict found between ActiveHDL6.1 and ModelSim SE
 
When both of them were installed on my pc, I found:
1.ModelSim can't compile Xilinx library
2.ISE will give a fatal error when ActiveHDL try generate post-PAR timing
simulation model

and they both can work well separately.



Paul Baxter 08-05-2003 08:48 PM

Re: Conflict found between ActiveHDL6.1 and ModelSim SE
 
Have you tried AHDL 6.1 service pack 1?

Though using it with Altera (cos I have to) there are various fixes to bits
and pieces. YMMV

"Jay" <[email protected]> wrote in message
news:[email protected]...
> When both of them were installed on my pc, I found:
> 1.ModelSim can't compile Xilinx library
> 2.ISE will give a fatal error when ActiveHDL try generate post-PAR timing
> simulation model
>
> and they both can work well separately.
>
>




Jay 08-06-2003 03:11 AM

Re: Conflict found between ActiveHDL6.1 and ModelSim SE
 
I've installed sp1 of AHDL, the problem still exists.
But I just tried its flow with ISE5.2.
"Paul Baxter" <[email protected]> 写入消息新闻
:[email protected]...
> Have you tried AHDL 6.1 service pack 1?
>
> Though using it with Altera (cos I have to) there are various fixes to

bits
> and pieces. YMMV
>
> "Jay" <[email protected]> wrote in message
> news:[email protected]...
> > When both of them were installed on my pc, I found:
> > 1.ModelSim can't compile Xilinx library
> > 2.ISE will give a fatal error when ActiveHDL try generate post-PAR

timing
> > simulation model
> >
> > and they both can work well separately.
> >
> >

>
>





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