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-   -   comparison with integer (http://www.fpgacentral.com/group/showthread.php?t=58361)

Jeff Brower 04-18-2006 04:48 AM

comparison with integer
 
All-

Inside an always block, I have to search a bitfield in an array of
registers and note it's position in a table. So I did this:

for (i=0; i<32; i++) begin

for (j=0; j<32; j++) begin

if (a[j][4:0] == i)

marker[i][j] = 1'b1;
else
marker[i][j] = 1'b0;
end
end

but XST appears to be doing something different with the integer
comparison than what I'm expecting, possibly sign-extending both sides
to 32-bits. Is there a way to "typecast" an index? Is something like
this a valid approach:

if ( {0, a[j][4:0]} == i ) ...

Thanks.

-Jeff


Mike Treseler 04-18-2006 03:42 PM

Re: comparison with integer
 
Jeff Brower wrote:

> but XST appears to be doing something different with the integer
> comparison than what I'm expecting, possibly sign-extending both sides
> to 32-bits. Is there a way to "typecast" an index?


Try your question on comp.lang.verilog.
In vhdl I would use an integer range or unsigned.
Whatever XST is doing, I expect that it would match modelsim.
I prefer trial-and-error simulation to synthesis.

-- Mike Treseler

Jeff Brower 04-18-2006 05:41 PM

Re: comparison with integer
 
Mike-

Thanks Mike.

> Whatever XST is doing, I expect that it would match modelsim.


The code above never makes equality, but I don't know how to fix it.
Would you know what this means:

Q13. An unconstrained integer results in bad quality.
A13. This is a known limitation in XST. Support for this is planned
for ISE 9.1i.

This is on page:


http://www.xilinx.com/xlnx/xil_ans_d...&iLanguageID=1

but I can't find any other Xilinx reference to it.

-Jeff



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