FPGA Central - World's 1st FPGA / CPLD Portal

FPGA Central

World's 1st FPGA Portal

 

Go Back   FPGA Groups > NewsGroup > FPGA

FPGA comp.arch.fpga newsgroup (usenet)

Reply
 
LinkBack Thread Tools Display Modes
  #1 (permalink)  
Old 04-17-2006, 03:59 PM
Marco T.
Guest
 
Posts: n/a
Default Which is the best way to measure low frequencies?

Hallo,
I should measure the frequency of an input signal.
Max frequency of signal is 100 KHz.

I have made a simple system to detect rising edge of input signal using a
flip flop.
It samples the input signal every system clock cycle.
To measure the input frequency I count the number of system clock periods
between two rising edges of input signal.

To test the system I' using a function generator.

Reading the data acquired (using a fixed frequency) I have watched that
every 5-10 datas there is an error.
The number aquired is about 50% or 75% less than the others.

Using a pull up resistor will be solved the error?

Otherwise I need a system that verify glitches?

--
Marco


Reply With Quote
  #2 (permalink)  
Old 04-17-2006, 04:12 PM
Jan Panteltje
Guest
 
Posts: n/a
Default Re: Which is the best way to measure low frequencies?

On a sunny day (Mon, 17 Apr 2006 16:59:07 +0200) it happened "Marco T."
<[email protected]> wrote in <[email protected]>:

>Hallo,
>I should measure the frequency of an input signal.
>Max frequency of signal is 100 KHz.
>
>I have made a simple system to detect rising edge of input signal using a
>flip flop.
>It samples the input signal every system clock cycle.
>To measure the input frequency I count the number of system clock periods
>between two rising edges of input signal.
>
>To test the system I' using a function generator.
>
>Reading the data acquired (using a fixed frequency) I have watched that
>every 5-10 datas there is an error.
>The number aquired is about 50% or 75% less than the others.
>
>Using a pull up resistor will be solved the error?
>
>Otherwise I need a system that verify glitches?
>

Hard to tell what your error source is.
But in all cases you need to make a fast rise clean pulse.
You need a Smitt-trigger.
Basically an opamp with some positive feedback.
Reply With Quote
  #3 (permalink)  
Old 04-17-2006, 06:35 PM
Peter Alfke
Guest
 
Posts: n/a
Default Re: Which is the best way to measure low frequencies?

If you want to measure 100 kHz with 1% accuracy, you need to count the
incoming pulses for at least 1 millisecond.
Or you can measure the 10 microsecond period length, if you have a
clock available that is faster than 10 MHz.

Measuring for a longer time reduces the impact of signal rise time and
jitter, but requires a counter to establish the ms time base.

This is all covered in hundreds of text books...
Peter Alfke

Reply With Quote
  #4 (permalink)  
Old 04-17-2006, 09:30 PM
Jim Granville
Guest
 
Posts: n/a
Default Re: Which is the best way to measure low frequencies?

Marco T. wrote:

> Hallo,
> I should measure the frequency of an input signal.
> Max frequency of signal is 100 KHz.
>
> I have made a simple system to detect rising edge of input signal using a
> flip flop.
> It samples the input signal every system clock cycle.
> To measure the input frequency I count the number of system clock periods
> between two rising edges of input signal.


For more precsiion, you can divide the Fu, before doing the time
capture.
Or, you can set up to capture a wide-timebase counter, and NOT reset the
counter between captures - then you have the option to choose
Cycles in SW, and the time is done by subtract, and you do not loose
any time-ticks, so have best precision.

>
> To test the system I' using a function generator.
>
> Reading the data acquired (using a fixed frequency) I have watched that
> every 5-10 datas there is an error.
> The number aquired is about 50% or 75% less than the others.


50% less is explained by false triggers on the wrong edge,
75% less is harder to explain, unless you are over more than one cycle ?

>
> Using a pull up resistor will be solved the error?
>
> Otherwise I need a system that verify glitches?


Hardware solution is to add a Schmitt trigger, and maybe also a RC filter.

SW patch is to read multiple captures, and reject ones that suddenly
'step' from previous readings.

-jg


Reply With Quote
  #5 (permalink)  
Old 04-18-2006, 01:46 AM
Steve Knapp (Xilinx Spartan-3 Generation FPGAs)
Guest
 
Posts: n/a
Default Re: Which is the best way to measure low frequencies?


Marco T. wrote:
> Hallo,
> I should measure the frequency of an input signal.
> Max frequency of signal is 100 KHz.


[... snip ...]

There is a frequency coutner reference design for Spartan-3E Starter
Kit board.
http://www.xilinx.com/products/board...quency_counter

I'm not sure how low in frequency that you want to go, but it does
measure from ~50 kHz to 100s of MHz. It also uses the PicoBlaze 8-bit
embedded controller macro.

[ADV]: Spartan-3E Starter Kit board
http://www.xilinx.com/s3estarter

[ADV]: PicoBlaze Controller
http://www.xilinx.com/picoblaze

---------------------------------
Steven K. Knapp
Applications Manager, Xilinx Inc.
General Products Division
Spartan-3/-3E FPGAs
http://www.xilinx.com/spartan3e
---------------------------------
The Spartan(tm)-3 Generation: The World's Lowest-Cost FPGAs.

Reply With Quote
  #6 (permalink)  
Old 04-18-2006, 07:44 AM
Marco T.
Guest
 
Posts: n/a
Default Re: Which is the best way to measure low frequencies?

Many Thanks to Everyone!

Marco


Reply With Quote
Reply

Bookmarks

Thread Tools
Display Modes

Posting Rules
You may not post new threads
You may not post replies
You may not post attachments
You may not edit your posts

BB code is On
Smilies are On
[IMG] code is On
HTML code is Off
Trackbacks are On
Pingbacks are On
Refbacks are On


Similar Threads
Thread Thread Starter Forum Replies Last Post
Command to measure real time kb33 Verilog 1 10-31-2005 06:22 PM
how to measure number of cycles in ISE6.3 Jack FPGA 1 07-27-2005 05:17 PM
level converter for high frequencies Stefan Oedenkoven FPGA 3 10-12-2004 07:58 PM
DCM for generating higher frequencies. Raghavendra FPGA 3 10-12-2004 06:24 PM
Slightly unmatched UART frequencies valentin tihomirov FPGA 38 12-05-2003 05:53 AM


All times are GMT +1. The time now is 01:39 AM.


Powered by vBulletin® Version 3.8.0
Copyright ©2000 - 2020, Jelsoft Enterprises Ltd.
Search Engine Friendly URLs by vBSEO 3.2.0
Copyright 2008 @ FPGA Central. All rights reserved