FPGA Central

Hmmmmm,

Are all of the posts today in honor of April Fools day?

I am having a hard time seeing if these are serious, or not.....

Austin

"Austin Lesea" <[email protected]> schrieb im Newsbeitrag
news:[email protected]...
> Hmmmmm,
>
> Are all of the posts today in honor of April Fools day?
>
> I am having a hard time seeing if these are serious, or not.....
>
> Austin

you want some 4/1 ?

sorry my posts are not foolish, the bugs i am experiencing are real. That V4
can not handle 16 clocks while V2 can can do it, that made me a bit unsecure
about using V4, the tools seem to be to untested ??

what makes me a little happier is that JTAG programming from bit files seem
to be unchanged for V2, S3 and V4 the same algorithm seems to work, I was
expecting more difficulties
http://wiki.openchip.org/index.php/O...:FpgaFreqMeter
V4LX support inclusive programming is now also added and tested

Antti

Atleast I am dead serious, the joke is inverted on the current boring
state of PC cpu architecture and Windows hell that we use every other
day of the year.

Ofcourse FPAGs make it possible to escape the madness and think about
something better.

JJ

Hi Austin,

> Are all of the posts today in honor of April Fools day?
>
> I am having a hard time seeing if these are serious, or not.....

All of this is serious, as far as I can tell. However, I liked the following
article:

http://www.theage.com.au/news/Breaki...862522200.html

Best regards,


Ben