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Old 05-21-2009, 10:56 AM
Posts: n/a
Default Re: ISIM and CONV_INTEGER warnings

"HT-Lab" <[email protected]> wrote in message
news:[email protected]
> It is quite easy to get gazillions of these messages in VHDL, for example
> before a reset is asserted or a tri-state bus feeding into an adder (as
> was in my case). These warnings prevents you from seeing any other
> messages. It also seriously hampers your simulation performance since
> writing to the transcript window (at least in Modelsim) is a real
> performance hog.

I sometimes forget just how little I know, and appreciate your patient

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