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Old 09-19-2006, 06:58 AM
Avion
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Default Re: Xilinx BlockRam: VHDL Model

Hi,
can u provide and example showing implementation of Blockram of 4
KByetes using RAMB4_Sn_Sm? thanks for the XST tip, will let you know
the result.
Regards.
Amal wrote:
> Avion wrote:
> > Hi,
> > i am trying to implement RAMB16_S9_S36 Block ram in Spartan IIE, which
> > does not support it. My aim is to utilize RAMB4_Sn_Sm in such a way to
> > make it a RAMB16_S9_S36, but it may have less number of address, i.e.
> > depth can be different than original RAMB16_S9_S36. can anyone help me
> > out? or someone can give me a complete VHDL model of this RAMB16_S9_S36
> > which must be either technology independant or at the most it must use
> > xilinx RAMB4_Sn_Sm ram. Thanks

>
> You can write memory models that can be inferred in by Xilinx XST or
> Synplify, or other synthesis tools. Take a look at Xilinx XST manual
> or Synplify reference manual. They have snippets that show you how to
> code generic RAMs.
>
> If you still needed more help let me know.
>
> -- Amal


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