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Old 04-11-2005, 09:21 PM
Tim Hubberstey
Posts: n/a
Default Re: VHDL language of choice?

Jim Lewis wrote:

> If you have a language issue that you think needs to be
> addressed, you can submit an enhancement request against
> it at:
> If you have trouble remembering this, there is a link to
> it at:

-- Warning! Rant_Mode <= true

The problem with this method is that there are some issues that the
language controllers are simply not willing to address.

Foremost among these, IMO, is the issue of a built-in pre-processor.
Nearly every person I have encountered who is just learning VHDL, but
has experience with another language, asks: Why is there no
pre-processor/macro capability?

From the very beginning (VHDL'87), it has been stated that the
designers don't want a pre-processor but that if you really feel the
need for one, there are many options available as stand-alone tools.
While this is indeed true, use of a 3rd party pre-processor results in
*non-standard* and *non-portable* code.

There are also those who say that you don't need a pre-processor because
there are other methods built into the language that do the same thing.
This is true in many cases but use of these methods almost always
results in far more complex (hard to maintain) code and/or an explosion
in the number of lines of total code.

Then there are the issues that, I believe (perhaps incorrectly), can't
(or shouldn't) be addressed by any solution other than a pre-processor.
One of the most common issues is having optional ports in an entity

Finally, there is the whole issue of compiler directives. This has been
"solved" by defining special "comments" that operate as directives. The
logical place for these directives, IMO, is as pre-processor directives.
Instead, we have what can only be described as a "hack"; these special
comments. I wonder how many other people have had problems with
inadvertent invocation of a directive because of an unfortunately-worded

The existence of a number of custom-designed pre-processors for VHDL is,
to me, a clear indication that this is a feature that is really a
language requirement.
Tim Hubberstey, P.Eng. . . . . . Hardware/Software Consulting Engineer
Marmot Engineering . . . . . . . VHDL, ASICs, FPGAs, embedded systems
Vancouver, BC, Canada . . . . . . . . . . .

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