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Old 04-09-2005, 05:01 PM
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Default Re: VHDL language of choice?

On Sat, 09 Apr 2005 15:33:53 GMT, David Bishop <[email protected]>

>Herb T wrote:
>> Folks,
>> I was talking to some electronics buffs on a chat channel, and they
>> were telling me that only Universities and DOD uses VHDL. I thought it
>> was hogwash, but wanted to find out if many commercial companies are
>> using the language earnestly. The resident HDL expert was saying
>> verilog is the language of choice these days. Is that true? I
>> personally prefer VHDL because the I already have too many reference
>> materials on how to use it.

>This is a myth prepuated by some people and companies that typically
>have a vested interest in Verilog or system Verilog.
>I have real data from Dataquest that says VHDL is about 50/50 with
>Verilog. Verilog has the advantage in ASIC space, and VHDL in FPGA
>space. Note that there are MANY more FPGAs being designed than ASICs,
>however ASICs are worth much more to the EDA companies than FPGAs are.

I have another piece of real data. If you go to dice and search for
VHDL and Verilog keywords across US and In Bay Area/Silicon Valley
Metro areas, you get almost even numbers in whole US and twice as many
Verilog related jobs in the Bay Area.Monster gives similar results
(320/304 for Verilog/VHDL) if you do a generic search and (140/80 in
Northern California). This seems to correlate with your Dataquest data
as Bay Area is heavily into ASICs and the distribution of FPGAs would
be more even across US.
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