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Old 11-02-2003, 12:29 PM
Valentin Tihomirov
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Default Re: Compare pairs of bits between two slv's ?

I've just reading an answer to my qustion here
http://www.eda.org/comp.lang.vhdl/FAQ1.html
and encountered Reduction section.

-- this concurrent assignment performs an "or"
-- reduction on "a_vec"
a <= '0' when (a_vec = (a_vec'range => '0')) else '1';

-- while this calculates an "and" reduction
a <= '1' when (a_vec = (a_vec'range => '1')) else '0';

Read there about reducing vectors containing 'X' values.


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