I just found another interesting solution to Willem's task. The
algorithm for a binary addition can be described as "invert all lower
bits up-to and including the first bit with a value of '0' and leave
the others untouched".

When two vectors V and (V+1) are XORed, its turns out that the result
is a vector where all bits that were changed by the addition are set
and the others are not set. However, to get only those lower bits of
the original vector V that were actually set, the entire vector has to
be shifted to the right by one. This requires that we have to maintain
a carry flag for the corner case of all bits in V being set.

,----
| process(aclr_l,clk)
| variable Tx_Clk_Cnt_tmp, Tx_Clk_Cnt_plus_one :
| unsigned(Tx_Clk_Cnt'high + 1 downto Tx_Clk_Cnt'low);
|
| begin
| if aclr_l = '0' then
| Tx_Clk_Cnt <= (others => '0');
| elsif clk'event and clk = '1' then
| Tx_Clk_Cnt_tmp := resize(Tx_Clk_Cnt, Tx_Clk_Cnt_tmp'length);
| Tx_Clk_Cnt_plus_one := Tx_Clk_Cnt_tmp + 1;
|
| Tx_Clk_En <= std_logic_vector(resize(shift_right(Tx_Clk_Cnt_plu s_one
| xor Tx_Clk_Cnt_tmp,
| 1),
| Tx_Clk_En'length));
| Tx_Clk_Cnt <= resize(Tx_Clk_Cnt_plus_one, Tx_Clk_Cnt'length);
| end if;
| end process;
`----

Since there are libraries with highly optimzed arithmetic blocks, this
solution might lead to a very efficient netlist.

-- Marcus