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Old 06-24-2003, 10:40 AM
Troels Smit
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Default Re: event in state machine

Ralf Hildebrandt <[email protected]> wrote in message news:<[email protected]>...
> Hi Troels!
>
>
> > I have to change state on the event change of a signal - so I wrote
> > the following posted below.
> >
> > when wait4lr =>
> > if lr'event then
> > next_state <= wait20sclk_and4_cordic;
> > end if;
> >
> > This give a bad synchronous description of my "next_state" signal.

>
>
> if lr'event then
>
> is (nearly) the same like
>
> if (rising_edge(lr) OR falling_edge(lr)) then
>
>
> This "dual-edge-flipflop" is not synthesizable.
> Furthermore It's not recommended to put rising_edge / falling_edge in a
> branch of a case-statement.
>


Well, you are right that this way of writing dual edge triggered code
does not work ... but it is possible.
I found that the following code indeed will synthesize, you will find
dual edge, and case sentenze mixed terribly, but it synthesizes and I
don't see the difference between what I posted yesterday and the test
code below:


case test3 is
when '1' =>
if (clk'event) then
if (clk='1') then
test <= '0';
else
test <= '1';
end if;
end if;
when others =>
null;
end case;


if (reset='1') then
test3 <= '0';
elsif (reset'event and reset='0') then
test3 <= '1';
end if;
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