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Old 11-14-2007, 07:31 PM
Peter Klemperer
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Default Re: Xilinx ISE Timing Report Question

Thanks Jochen, that did it for me. I should have grep'd for it.

--Peter

On Nov 14, 12:19 pm, Jochen <[email protected]> wrote:
> On 14 Nov., 18:23, Peter Klemperer <[email protected]> wrote:
> Hi Peter,
>
> > Hi,
> > <snip>
> > I've seen them in several project so my guess is that they
> > have something to do with using chipscope or that these are the names
> > of some sort of global clock net.

>
> > Thanks in advance,
> > Peter

>
> using chipscope, you should see an edif-netlist like "icon.edn" or
> something
> like this, that will integrated automatically within your toplevel
> design running ngdbuild.
> I guess, you'll find a file called "icon.ncf" within the same
> directory
>
> If you have a look at it's content with a simple editor, you should
> find said timing-constraints - and they will be automatically linked
> to your design, too.
>
> They are needed to guarantee chipscope's functionality (JTAG-
> clock,...)
>
> hope, it helps,
> Jochen



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