View Single Post
  #7 (permalink)  
Old 05-07-2007, 04:43 AM
Bryan
Guest
 
Posts: n/a
Default Re: Spartan 3A Starter Kit Multiboot Demo Config 4 Display Problem

Hi all, sorry for the confusion, anyway to answer any doubts, the said demo
was the one as described by Eric Crabill where you can edit the picture from
the camera on the video display. The hardware used is also as described by
Eric. This design i am not sure why is it not posted yet. Well i do work in
Xilinx Asia Pacific and i have posted internal tech support as well but no
reply yet. Also I did not see this demo at XFEST , rather tomorrow is XFEST
@ Singapore and I am manning the booth, so that is why i sound so troubled
and urgent. Meanwhile i have contacted faes and sales rep as well so
hopefully it will all work out.


(P.S: I am not that well versed in FPGA system level design yet, just a
newbie)


"Antti" <[email protected]> wrote in message
news:[email protected] oups.com...
> Eric Crabill schrieb:
>> Hi Jim,
>>
>> I don't usually look at the message headers, because it plays no role in
>> my
>> deciding to answer a question. Maybe Bryan does work with/for Xilinx!
>> In
>> any case, Bryan, I hope I answered your question.
>>
>> You can get a working DDR2 interface from MIG 1.7 specifically for the
>> Spartan-3A Starter Kit. There's also a working design derived from that
>> in
>> the board test design that is posted on the Spartan-3A Starter Kit
>> reference
>> design page. I think what some previous posters wanted was more than
>> "working", rather a "stress test" or something that really demonstrates
>> the
>> bandwidth of the memory interface. I agree that such a demo or reference
>> design would have value. Do I have any comments/release schedules to
>> share?
>> No, sorry.
>>
>> Eric
>>
>> "Jim Granville" <[email protected]> wrote in message
>> news:[email protected]
>> > Eric Crabill wrote:
>> >> Hi Bryan,
>> >>
>> >> Maybe you saw the video pass through design at an XFEST event or at
>> >> the
>> >> Spartan-3AN press release event? Otherwise, I am not sure how you
>> >> would
>> >> know it exists. If you are looking for that design, please contact
>> >> your
>> >> local FAE or sales representative for assistance. I am not sure
>> >> if/when
>> >> this design will be posted.
>> >
>> > Err.., I think he IS the local FAE / Sales rep, as his address
>> > claims
>> > Xilinx ?.
>> >
>> > It maybe that it was an 'oops' posting, meant to go upstream inside
>> > Xilinx. [yes, does happen sometimes...]
>> >
>> > Any comments/release schedules re Antti's questions about DDR2 working
>> > examples on 3A demo system ?
>> >
>> > -jg
>> >

>
> Eric,
>
> it looks like I am missing something
>
> 1) the only thing at X-Fest was the rotazoom that takes images from
> NOR flash
> no video pass through demo (at X-Fest in Munich)
>
> 2) the only "derived" DDR2 design seems to be board test design where
> PicoBlaze
> reads out the MIG testbench error led status and displays p or f on
> hyperterminal -
> is this the MIG derived design you have been referreing to, or is
> there some more
> functional design available?
>
> Antti
>



Reply With Quote