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Old 05-24-2006, 10:10 AM
John Adair
Posts: n/a
Default Re: FPGA delay generator

You might want to look at our Hollybush1 product. We have a LVDS oscillator
module position, and module, that is capable of generating clocks up to 700
Mhz into the Spartan-3 on that board. The Spartan-3 on than board will
realistically operate at input clock of 250-270 MHz (single rate) on the I/O
and 500 Mhz DDR style with careful design. Maybe a bit faster if you are
lucky. That will give at least 2nS resolution and more may be possible with
phased clocks or using clock enables if the clock enable logic can be made
to go fast enough.

We will also have a V4 FX12 module for this board in design shortly that
will be capable of higher clock rates and hence resolution. Hollybush1 can
take an add on module with up to something like 110 I/O connecting to the
Spartan-3 available.

Longer term we are looking at a PC104 equivalent as a product. We are
already doing customer specific PC104 derivatives of Hollybush1 so when we
get a free engineering slot it will get done and released as a Enterpoint

John Adair
Enterpoint Ltd. - Home of Hollybush1. The PC104+ Spartan-3 Development

"amko" <[email protected]> wrote in message
news:[email protected]
Hello everybody,

Currently I am designing very accurate delay generator, which will be
based on FPGA .
This delay generator should have similar technical requirements with
The major Delay Generator requirements are

2 ns (1ns is desired, but 2ns will be also ok) time resolution on
delayed channel (it means that time differences between any delayed
channels can be set in 2 ns steps)
maximal 50 ps - 60ps (RMS) jitter on each output.
14 delayed ECL channels
Two high speed (PECL) inputs (500 Mz ECL clock signal and ECL
Configurable via standard bus (Ethernet/USB/Serial bus)
Internal trigger with variable rate (DDS)
Internal clock oscillator
Clock master or slave

Does anybody know for commercial available FPGA boards (preferred ISA
(PC104) or PCI (PC104 plus) standards) that can be suitable for my
Sutiable FPGA for my design is V5 or Stratix 2 GX.

Thank you and Regrads,

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