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Old 05-07-2006, 04:10 PM
Mike Treseler
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Default Re: The differences between behaviors of 'std_logic_vector' and 'unsigned'

Weng Tianxiang wrote:

> Actually one cannot see any big differences between 'unsigned' and
> 'std_logic_vector'.


The package contains much more than that type declaration.
Have a look at the functions that cover unsigned.

http://www.csee.umbc.edu/help/VHDL/p...umeric_std.vhd

-- Mike Treseler

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