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Old 05-02-2006, 04:57 PM
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Default Re: Xilinx Virtex-4 OCM Usage Issues

Update:
Well, I have gotten past the SDRAM execution issue! The board still
does not function correctly, but it appears that this is related to our
code and just needs more time to debug.

I got the development board up and running the same code from the same
location and compared this to our board (we have our own PLB memory
controller because we have a 16-bit SDRAM interface instead of the
32-bit used by the Xilinx memory controller). I noticed that our
Sl_ssize was set incorrectly (not sure why). Changing this to specify
a 64-bit bus width results in a code exectuation out of SDRAM.

Thanks for everyone's input - if I learn anything else from this issue,
I'll post under this topic.

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