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Old 04-29-2006, 12:34 AM
Stephen Williams
Posts: n/a
Default Re: Xilinx SystemACE on multi-FPGA board

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Ed McGettigan wrote:
> Stephen Williams wrote:
>>> 8) What exactly does this mean?
>>> "The SystemACE driver is getting an error that the JTAG
>>> configurator
>>> was unable to read the configuration stream from the CF."

>> These are the error, status and control register contents when the
>> Linux kernel discovers the error:
>> CONTROLREG=0x10a STATUSREG=0x19035e ERRORREG=0x2098
>> The Linux kernel is 2.4.33-pre1 w/ the mvista SystemACE drivers
>> for Linux 2.4.
>> The error messages from the kernel driver are:
>> CompactFlash write command failed
>> CompactFlash sector failed to ready
>> CompactFlash sector ID not found
>> JTAG controller couldn't read configuration from the CompactFlash

> I had a quick discussion with our Linux/UBoot expert and the SystemACE
> designer as well as reading your original case that you filed with our
> hotline and we believe that the SystemACE driver code that you are using
> is resetting the SystemACE and causing another configuration of the
> devices in the chain.

(Thank you for actually *understanding* my situation! It's a relief.)

> In the case of the single FPGA in the chain the SystemACE reconfiguration
> may complete and return control to the MPU port before another MPU access
> is made. While in the case of the two FPGAs in the chain the
> reconfiguration
> is still occurring when you attempt another MPU access. In any case you
> should not be reconfiguring the devices a second time (unless you really
> want to)
> and our Hotline had given you instructions on how to prevent the
> reconfiguration.

If you are referring to the FORCECFGMODE and CFGMODE bits, note in
the CONTROLREG dump that they are set according to the recommendations
we received: FORCECFGMODE=1, CFGMODE=0, CFGSTART=0. I've put dumps of
the CONTROLREG in several places in the driver and I do not see that
those bits are being changed.

I agree that it seems like the SystemACE thinks it needs to reload
the FPGAs. The question is *why* does it think that. So far as I can
see, the FORCECFGMODE should prevent that. I can't find anywhere in
the Linux driver that this bit is being wiggled, and a dump at the
crash point shows that it is still set up correctly.

> If you would like to confirm this theory you can put a scope probe on the
> CFG_TCK pin from SystemACE and you should see it actively toggle, stop for
> a period of time after the 1st configuration and then restart again at some
> point before stopping permanently.

I will try to perform this test.

>>> 9) It sounds like you filed a case with our hotline, what number were
>>> you assigned?

>> Case # 628407
>> (The webcase person asked none of these questions.)Our

- --
Steve Williams "The woods are lovely, dark and deep.
steve at But I have promises to keep, and lines to code before I sleep, And lines to code before I sleep."
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