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Old 04-26-2006, 04:13 PM
Austin Lesea
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Default Re: Async FPGA ~2GHz

dp,

Even Intel has realized that frequency kills. Not sure why they are so
excited about touting 2 GHz.

The fets are running in "active mode" basically just behaving as analog
(low gain) transistor amplifiers in their sub threshold regions...kinda
on, kinda off, kinda inbetween.

I am sure that the speed of operation is very slow down at 0.2V.

At 3.9 volts on a 90nm transistor, I am guessing the lifetime to
breakdown is about a week, or sooner.

I'd like to see them get block RAM, processors, DLL's/PLL's, MGTs, etc.
to work in the same fashion. I am sure we all know the stories of the
attempts at making async microprocessors, and how they were abandoned
for having far too much area, and no real performance benefits.

And when async logic is running as fast as it can, it is going to have 2
to 3 times the power dissipated, as that is how many more wires and
transistors are switching. Asnyc when doing nothing is very low power.
I just love systems that do nothing: they end up going away (why does
anyone care what a system does when it has nothing to do? Just turn it
off!).

Their press announcement did say that now that they have the core
working, they need to get their (hardened?) IP to work, next.

Without all these bells and whistles that now make up a modern FPGA
offering, they are basically back in the XC2064 era: basic fabric, some
IO, and no tools.

One other point: their design is about 16X more area (less density)
than a modern FPGA. That is going to be a real killer - <100K gates for
~$10? When the market is at 1M+ gates for <$10?

Good luck.

Async design is a religion, and you either believe it will save you, or
you don't. I'm just a sceptic. I am still waiting to see it do
something useful in the marketplace.

More interesting (I think) is the (synchronous) FPOA, with its enforced
pipelining, and medium grain architecture aimed at extreme DSP
applications. At least that product looks like one can actually use it,
and it does something. Although 30W power dissipation is just about
twice what most folks can deal with.

Austin

dp wrote:

>>I'm amazed they have achieved this operation over the 0.2V - 3.9V supply
>>range. 0.2V is not much voltage at all... I would have thought
>>transistor threshold voltages would have caused issues at such a low
>>voltage. How are they achieving such low threshold voltages?

>
>
> Sounds interesting to me as well, perhaps some of the other 90nm
> manufacturers could shed some light - does it really work? Probably
> not at full speed, but even at DC - do the FETs really turn on at 0.2
> V?
> While I am not sure what this synchronous/asynchronous gimmick is
> all about I would say I am glad they may soon have a marketable
> alternative to the rest of the makers, I guess they all became a bit
> too big to talk to (and stay innovative).
>
> Dimiter
>
> ------------------------------------------------------
> Dimiter Popoff Transgalactic Instruments
>
> http://www.tgi-sci.com
> ------------------------------------------------------
>
>
> Bevan Weiss wrote:
>
>>Jim Granville wrote:
>>
>>>For those interested in Async devices, and uses :
>>>
>>>http://www.achronix.com/news.html?ne...69ce9b919f7562
>>>
>>>
>>>It is a way's off being usable, but the numbers are impressive
>>>
>>> No mention of device size, but the info suggests they target the
>>>high-price/low volume user space.
>>> [ Not too many customers need -196'C ]
>>>
>>>.. and no mention of design tools, which may prove to be a bigger
>>>challenge than the silicon.
>>>
>>>-jg

>>
>>I'm amazed they have achieved this operation over the 0.2V - 3.9V supply
>>range. 0.2V is not much voltage at all... I would have thought
>>transistor threshold voltages would have caused issues at such a low
>>voltage. How are they achieving such low threshold voltages?
>>
>>
>>Bevan

>
>

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