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Old 04-25-2006, 08:55 PM
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Default Re: Xilinx Virtex-4 OCM Usage Issues

Thanks for the suggestion - my explaination wasn't very clear: Our
first iteration used a small BRAM on the PLB bus to boot, loaded SDRAM
(which was defined as cached memory space), and then ran out of SDRAM.
With the all the PLB arbitration and overhead logic, this resulted in a
4% of our virtex 4 (fx20). Currently, we're around 85% and would like
to save this 4% to help build time and allow for future flexibility.


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