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Old 04-25-2006, 06:31 PM
Ben Jones
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Default Re: Xilinx Virtex-4 OCM Usage Issues

Hi Charles,

<[email protected]> wrote in message
news:[email protected] oups.com...
>
> I've been struggling to get the Xilinx IOCM and DOCM modules working
> with the PPC405 in my current design and I'm starting to run out of
> ideas. The first iteration of the design uses cached SDRAM via the PLB
> to store/load the boot code and runs without issue. Since the design
> is starting to get full (running out of LUTs, but BRAMs are available),
> it was decided that it might be worthwhile to use the OCM interface to
> cut down on logic. The OCM should be the perfect solution because the
> boot code is currently only called once and then code executes out of
> SDRAM.


Sounds like a bit of a puzzle. I do recall hitting a slight problem with the
OCM before: the instruction-side OCM is completely hidden from the
processor's data read/write path. So if your program tries to read
0xFFFFC000 - 0xFFFFFFFF it will not see its own code.

I can't see how this would be causing you problems though... particularly as
you say you've seen the first packet of instructions being fetched from the
SDRAM, so the OCM should really be out of the picture at that point. (I
can't remember exactly why this caused *me* problems; I think it was
something to do with the way the standard library was compiled that it had
some data stored in the code space, which could never be accessed.)

So my suggestion is, why not dump the OCM entirely and use a small chunk of
initialized BRAM attached to the PLB as your boot ROM instead? Perhaps there
is a little overhead in terms of decode logic vs. OCM, but probably not so
very much.

Cheers,

-Ben-


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