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Old 04-25-2006, 10:33 AM
Andreas Ehliar
Posts: n/a
Default Re: Xilinx Virtex-4 OCM Usage Issues

On 2006-04-24, [email protected] <[email protected]> wrote:
> Basically it seems like the bus is hooked up correctly, but that maybe
> a register bit or mode is not correct. I am wondering if anyone in
> this forum has the IOCM/DOCM working and also executes code out of
> SDRAM (or anyone else who has comment) - are there any register bits
> that I might have left out? Does software have to do anything
> differently now that the design is non-cached (I have tried
> initializing all cached registers...)?

I assume that the end of your bootloader looks something like this:


Do you issue a sync and isync instruction before jumping to sdram?
Personally I've had the experience that the ppc405 can act very weird if
you don't issue a sync and isync instruction before you jump to
recently modified code.

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