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Old 04-18-2006, 03:57 AM
Posts: n/a
Default Re: How to apply timing constrains for large bus

> If the fanout of the select is your biggest problem, don't "buffer"
> those signals but replicate the registers. You need to talk the
> synthesizer into leaving the replicated logic in your design; in
> SynplifyPro I'd use the syn_preserve directive to keep those replicated
> registers in my design.

So what you are suggesting is duplicate the registers in the code
and tell the synthesizer not to optimize it. Is there any way we can
force the synthesizer to do both.

> If you can pipeline your 50:1 mux you can keep the performance and the
> simple mux structure rather than time-multiplexing a multiplex which...
> shouldn't produce any net benefit.

This is not possible as i am not allowed to introduce any pipeline

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