View Single Post
  #4 (permalink)  
Old 04-14-2006, 03:50 PM
John Larkin
Posts: n/a
Default Re: humble suggestion for Xilinx

On 14 Apr 2006 03:03:17 -0700, "KJ" <[email protected]> wrote:

>John Larkin wrote:
>> On a pcb, CCLK is often a shared SPI clock, with lots of loads
>> and stubs and vias and such, so may not be as pristine as a system
>> clock. CCLK seems to be every bit as touchy as main clock pins, and it
>> really needn't be.

>What it's really saying is that when designing a PCB, CCLK should be
>treated with as much care and respect as any other clock signal so you
>won't have lots of loads, stubs and vias and such.

And what I'm saying is that treating it as such shouldn't be


Reply With Quote