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Old 04-14-2006, 12:03 PM
KJ
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Default Re: humble suggestion for Xilinx

John Larkin wrote:
> On a pcb, CCLK is often a shared SPI clock, with lots of loads
> and stubs and vias and such, so may not be as pristine as a system
> clock. CCLK seems to be every bit as touchy as main clock pins, and it
> really needn't be.
>


What it's really saying is that when designing a PCB, CCLK should be
treated with as much care and respect as any other clock signal so you
won't have lots of loads, stubs and vias and such.

KJ

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