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Old 12-07-2005, 07:15 AM
Posts: n/a
Default Re: Xilinx FPGA - Behaviorial Model Transferred Instead of Place-and-routed Model

Oh, by the way, I did get this in my Post-translate Simulation Model

Command Line: netgen -intstyle ise -sdf_anno true -w -ofmt verilog -sim
test.ngd test_translate.v

WARNING:NetListWriters:550 - Ignoring non-applicable option -sdf_anno
for input
file with 'ngd' extension.
Reading design 'test.ngd' ...

Can anyone tell me if that's wrong?

Thanks in advance.

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