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Old 10-18-2005, 07:48 PM
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Default Re: Storing a file onto FPGA

Robert wrote:

> I am writing a verilog code whereby I read data from a txt file and use
> it in one of the modules. I want to store the data from the .txt file
> on to FPGA, where it can be used by other modules. How can I embedd the
> .txt file in synthesis? Does Xilinx have a way of doing it so that the
> .txt file information is included in the .bit file which is burned on
> the FPGA?


Others have pointed out most of the pieces.

1) With XILINX, for the actual FPGA use a BMM file and data2mem to
initialize the rom contents in the bitstream. It's a pain to figure
out and I last did it a year ago so I don't remember the details, but
when you get it all worked out put it in a makefile that runs your
table generator, updates the bit file and downloads to the FPGA.

2) For simulation, write a program that generates verilog code to
initalize the memory. Yes, XILINX makes you initalize it a different
way for simulation than for synthesis. Unlike apparently VHDL, verilog
has an include directive, so you don't have to have your code generator
recreate an actual verilog file each time, it can just spit out the
file with the initialization commands. Put this in a makefile too...

This is pretty much the same problem as how to load ROM contents for a
custom embedded processor (ie, one where you aren't using embedded
development tools that handle the whole deal for you)

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