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Old 10-16-2005, 01:01 PM
Posts: n/a
Default Re: Storing a file onto FPGA

Hi Erik, Ray,
OK, simulation is a good reason! I was thinking about DSP apps where I tend
to simulate to make sure the VHDL works, but often don't simulate the VHDL
for every single different filter I design; I prefer to simulate just the
DSP with Matlab or something similar.
The design flow where I use data2mem is when I want to tweak the performance
of a dsp filter (say) but don't need or want to wait for a P&R cycle each
time. Once everything is working I do go back and paste the data directly
into the VHDL so that subsequent builds don't require the data2mem thingy.
So, as you both say, horses for courses!!
Thanks guys, Syms.

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