View Single Post
  #7 (permalink)  
Old 10-14-2005, 11:52 AM
Philip Freidin
Posts: n/a
Default Re: Storing a file onto FPGA

On 13 Oct 2005 11:39:06 -0700, "Robert" <[email protected]> wrote:
>Also, when you say cutting and pasting into VHDL code, do you mean that
>I'll have to do this each time the data in my txt file changes?

The answer to this would typically be yes.

>data I generate in the text file will change depending on my inputs. I
>need a way so that I can quickly load/initialize the RAM with the new
>values from txt file.

I'm confused by this. In your earlier post, you said that the
text file was created by a Python program. You then wanted a
way to take this text, and encode it somehow and have it included
in the bitstream that configures the FPGA. There are many ways to
do this, and some have been described by other posters to your

By "inputs" do you mean signals to your FPGA, or parameters to
your Python program?

If there is a small set of inputs, then I guess you could build
them all and load them all into the FPGA (needs N x memory), and
select at runtime what you need. If the parameters are unbounded,
then you need a more complex process, since this implies running
Python for each change in the inputs.

>Thanks in advance.

Ray pointed out that a cut-and-paste process can be used to get
from a text file to a block of VHDL/Verilog initializer statements,
or with Xilinx's data2mem program. If you find yourself going down
this path, I highly recommend that use an editor program that
includes a "column edit" mode, and maybe also a hex mode. My
favorite editor is UltraEdit, that is reasonably cheap, and an
excellent programmer's editor.


Philip Freidin
Reply With Quote