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Old 03-29-2005, 09:20 PM
genlock
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Default Re: Dividing a 24 bit std_logic_vector by a decimal number

Yes the decimal number is a constant value.

What do you mean by embedded multipliers?

Is there a VHDL code available for that or how do we go about coding
one.

I dont need a clock for this one.

Thankyou

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