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Old 01-17-2005, 01:44 AM
Jeremy Stringer
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Default Re: Problems in timing simulations

> My design has been P&R for two frequencies : 50 MHz and 80MHz.
> In this two cases, the timing report indicates no errors and all the
> timing



Just to clarify, you have synthesised/placed and routed twice, with
different constraints, generating a 50MHz capable design, and a 80MHz
capable design? i.e You aren't mixing the 50MHz and 80MHz clocks in one
design?

Jeremy
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