Dear Mark,
Seems to be a half-band filter (half of the Nyquist freq of 6 MHz) so, when
you use a FIR filter you can leave out half of the taps. The Xilinx core
generator can generate a nice filter for you. For the tap values use some
FIR design tool, look at www.mediatronix.com/tools for a free one, it can
export to Xilinx .coe files.
Regards,
Henk van Kampen
www.mediatronix.com

"markp" <[email protected]> wrote in message
news:[email protected]...
> Hi All,
>
> I need to implement a low pass digital filter on 12 bit ADC data in a
> Spatan
> IIE device, but I'd like it to be multiplier free - in other words just
> use
> adders and bit shifting for the coefficients. The sample rate is 12Mhz and
> I
> need a sharp cut-off at around 3MHz. Does anyone know of a simple design
> (IIR?) to do this, or a website/tutorial to give me some pointers? I've
> seen
> several websites with coefficient calculators, there are always a few
> coefficients that can't be easily calculated with bit shifting and adding.
>
> Thanks!
>
> Mark.
>
>