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Is it possible to Reverse-Engineer an FPGA Output file?
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10-04-2004, 04:44 PM
Jock
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Is it possible to Reverse-Engineer an FPGA Output file?
Is it possible to take the
FPGA
.hex file, for example and given that you
know the device, reverse-engineer it into either it's CLB map or back to
it's high-level HDL code?
Jock