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Old 01-05-2004, 02:41 AM
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Default Xilinx Logicore PCI64 Problem

Hi,

I am using Xilinx PCI_64_66_CORE Build 106 (04-04-2003) with ISE
4.2i/FPGA Express/VHDL design flow. When I try to translate, a.k.a.
NGDBUILD, the design, I encounter the following errors:

ERROR:NgdBuild:393 - Could not find INST(S)
'PCI_CORE/PCI_LC/PCI-AD64/IO31/OFD'
in design 'gefsc_top'. INST entry is 'INST
"PCI_CORE/PCI_LC/PCI-AD64/IO31/OFD" IOB = TRUE ;'

ERROR:NgdBuild:393 - Could not find INST(S)
'PCI_CORE/PCI_LC/PCI-AD64/IO30/OFD'
in design 'gefsc_top'. INST entry is 'INST
"PCI_CORE/PCI_LC/PCI-AD64/IO30/OFD" IOB = TRUE ;'

ERROR:NgdBuild:393 - Could not find INST(S)
'PCI_CORE/PCI_LC/PCI-AD64/IO29/OFD'
in design 'gefsc_top'. INST entry is 'INST
"PCI_CORE/PCI_LC/PCI-AD64/IO29/OFD" IOB = TRUE ;'

The error continues for the whole bus width, and for other signals as
well.
I think the ucf file specifies the constraints using "/" to reference
the instance, but the core instantiates in a different way. There is a
file by the name of "pci_lc_i.vhd" which I found the instance
PCI_AD64_IO31_OFD instantiated as:

PCI_AD64_IO31_OFD : X_FF
port map(
......

Does this mean I have to change the ucf file's constraint statements?
Can anyone in the group who has used xilinx logicore pci64 advice me
on this?

Any help is greatly appreciated.

Regards,
LC
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