Thread: LVDS in cyclone
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Old 09-10-2003, 08:00 PM
Eduard Nikke
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Default LVDS in cyclone


Can someone help me with this issue.

I am looking to build a serialer in a FPGA.
Base frequence is 72MHz - 7 bits serialiser - so I need a LVDS frequence of

I thought this wat not possible in a Cyclone device but just reads the app.
note and it seems to be possible.

I have only some strong concerns because there is no timing budget and the
IOB are not DDR IOB blocks.

Does any one has experience with this app. note ?



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