Thread: PCI Clock Issue
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Old 08-27-2003, 09:12 AM
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Default PCI Clock Issue


I have Implemented PCI Core in xilinx FPGA. The clock input to the
core is coming from the the mother board. And Should i include the DCM
for the clock input before giving it to the internal design. Won't it
affect the specification.

Becasue DCM may introduce some shift in the Clock. And PCI is not
source synchrnous. It is operating under common clock.

Correct me if i am wrong.

Thanks and Regards,
Muthu S
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