View Single Post
  #4 (permalink)  
Old 04-05-2007, 05:06 PM
John_H
Guest
 
Posts: n/a
Default Re: inferring a dual port memory

"Verictor" <[email protected]> wrote in message
news:[email protected] ups.com...
<snip>
> Right. I am working on an ASIC target. My tools are Physical Compiler
> and a 130nm process. I tried before I posted my question. It just
> didn't provide what I need. Can you tell me what to look at when it
> infers cells?
>
> Thanks a lot


I can't, perhaps someone else can.

The Physical Compiler documentation may include specific documentation on
inferring memories. It's important enough in my FPGA work that the
synthesis tools I work with have several pages dedicated to memory
inference. It may be that you need to instantiate dual ports in this tool.
It may be that you need to have two versions of the address to get the
synthesis to recognize it as two ports rather than a malformed single port
memory; this was a problem for another poster recently. If you can't find
documentation, try the technical support you're already paying dearly for.


Reply With Quote