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Old 03-01-2006, 07:03 AM
Posts: n/a
Default Re: How do I make dual-port RAM from single port RAM?

So if you are back porting from FPGA to ASIC something stands out right
away which makes this even more messy. Your logic & wiring paths will
now gain significantly in performance but a comparable DPRAM is similar
in performance between ASIC and FPGA for same feature and memory sizes
since they are the same thing (almost). Perhaps there is an option to
double up processing on the logic side rather than try to double up on
SPRAM side.

At this point I can only suggest before continuing with the ASIC, redo
the FPGA design so that it also only uses 1 port atleast you don't burn
masks, tie your hand behind your back on the cheap. Then it should be
easier to convert, atleast you can prove the redesign before

Your other option if you really really must use 2 concurrent writes
with no other possibility is to go and get a DP WW RAM core from one of
the ASIC IP houses, Mentor, Cadence, Synopsys and a couple of others
come to mind, not sure who has which. I thought most of the asian
foundries would include such blocks in their library, otherwise it
seems you have a limited library.

So what is the application, & size of DP WW RAM ?


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