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Old 07-20-2003, 10:55 PM
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Default Re: Verilog based PCB design flow?


Verilog netlist? Do you mean a netlist created from a Verilog
structural representation? If so, OrCAD can do that.


On 20 Jul 2003 12:31:19 +0200, Petter Gustad
<[email protected]> wrote:

>
>Are there any PCB design packages which let you do your PCB layout
>using a Verilog netlist as source?
>
>In most PCB CAD programs you'll have to draw a schematics and draw
>symbols for each part. I would like to use a Verilog (or even EDIF)
>netlist as a base for the PCB layout work. Of course the physical
>parameters for each part has to be specified and mapped to their
>respective instances in the verilog netlist.
>
>Petter


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