Submitted by fpgawhitepaper on September 14, 2008 - 12:09am
Whitepaper By:
Xilinx
In a First-In First-Out (FIFO) memory subsystem, data is written and retrieved in exactly the same order; the first data written into the memory is the first data read out of the memory.
Submitted by fpgawhitepaper on September 14, 2008 - 12:08am
Whitepaper By:
Xilinx
Signal integrity (SI) engineering is difficult to avoid in current electronic systems. It is needed now more than ever to save time and money, and to enable the design to work reliably.
Submitted by fpgawhitepaper on September 14, 2008 - 12:08am
Whitepaper By:
Xilinx
Today’s connected society requires secure data encryption devices to preserve data privacy and authentication in critical applications.
Submitted by fpgawhitepaper on September 13, 2008 - 11:50pm
Whitepaper By:
Xilinx
This white paper gives an overview of digital modem technologies and how Xilinx high volume programmable devices can be used to implement complex system level glue in digital modem designs.