FPGA Whitepapers/ CPLD Whitepapers

The Evolution of High Speed Transceiver Technology

Whitepaper By: 
Altera

The Internet revolution has led to a massive increase in data traffic.

Stratix GX in Switch Fabric Systems

Whitepaper By: 
Altera

The switch fabric is one challenge designers face when creating a system that routes data from one of many inputs to any one of many outputs.

Stratix GX in Storage Applications

Whitepaper By: 
Altera

The storage market is driven by a convergence of storage and networking technologies, information growth, and advances in storage and infrastructure bandwidth.

Traffic Management in Stratix GX Devices

Whitepaper By: 
Altera

Data networks were designed to meet the rapidly increasing bandwidth requirements of Internet traffic, which increased line rates by 400 percent every 2 to 3 years.

Soft Multipliers For DSP Applications

Whitepaper By: 
Altera

New communication standards and high channel aggregation system requirements are pushing Digital Signal Processing (DSP) system performance requirements beyond the capabilities of digital signal proc

MorphIO: An I/O Reconfiguration Solution for Altera Devices

Whitepaper By: 
Altera

Altera developed the MorphIO software to help designers use the I/O reconfiguration feature in Altera® devices.

Configuring the MicroBlaster Fast Passive Parallel Software Driver

Whitepaper By: 
Altera

The MicroBlaster fast passive parallel (FPP) software driver is an embedded solution for configuring Altera® SRAM-based programmable logic devices (PLDs).

An Analytical Review of FPGA Logic Efficiency in Stratix, Virtex-II & Virtex-II Pro Devices

Whitepaper By: 
Altera

This white paper will demonstrate through concrete benchmark data and architectural comparisons that Altera’s Stratix™ FPGA products have a 9% logic resource utilization advantage over Xilinx Vir

Using Pre-Emphasis and Equalization with Stratix GX

Whitepaper By: 
Altera

New high speed serial interfaces provide a major benefit to designers looking to provide greater data bandwidth across the backplanes or when interfacing chip to chip.

Selecting the Correct High Speed Transceiver Solution

Whitepaper By: 
Altera

Many standards and protocols are now using high speed transceivers (SERDES) as part of their physical interface.

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