FPGA Whitepapers/ CPLD Whitepapers

WP218 - Achieving Breakthrough Performance in Virtex-4 FPGAs

Whitepaper By: 
Xilinx

Virtexâ„¢-4 FPGAs are the first multi-platform FPGA family based on the revolutionary Advanced Silicon Modular Block (ASMBLâ„¢) architecture.

WP224 - Negative-Bias Temperature Instability (NBTI) Effects in 90 nm PMOS

Whitepaper By: 
Xilinx

This paper describes Negative-Bias Temperature also describes how Xilinx has proactively addressed this challenging behavior.

WP226 - Spartan-3 vs. Cyclone II Performance Analysis

Whitepaper By: 
Xilinx

When publishing FPGA device speed models for software (commonly referred to as “speed files”), it is very important to consider the effect on a user of changes that might be necessary to the spee

WP226 - Spartan-3 vs. Cyclone II Performance Analysis

Whitepaper By: 
Xilinx

When publishing FPGA device speed models for software (commonly referred to as “speed files”), it is very important to consider the effect on a user of changes that might be necessary to the spee

WP253 - Simplifying the FPGA Configuration Design Process

Whitepaper By: 
Xilinx

This paper focuses on how Xilinx Platform Flash PROMs simplify FPGA configuration design for system and board designers.

WP256 - Xilinx FPGAs Overcome the Side Effects of Sub-90 nm Technology

Whitepaper By: 
Xilinx

Each issue is reviewed with respect to its effect on system design using ASSP, ASIC, or FPGA devices, and what Xilinx has done to alleviate the potential problems.

Using CoolRunner CPLDs in Smart Card

Whitepaper By: 
Xilinx

This document presents the different types of smart cards and their applications and discusses the variety of smart card readers available and what functions they can perform.

WP275 - Get your Priorities Right – Make your Design Up to 50% Smaller

Whitepaper By: 
Xilinx

Would it be useful for your next design to be up to 50% smaller without significantly changing the ways you do things now?

WP286 - Continuing Experiments of Atmospheric Neutron Effects on Deep Submicron Integrated Circuits

Whitepaper By: 
Xilinx

In the September 2005 issue of IEEE Transactions on Device and Materials Reliability, the article entitled The Rosetta Experiment: Atmospheric Soft Error Rate Testing in Differing Technology FPGAs [R

WP160 - Emulating External SERDES Devices with Embedded Rocket I/O Transceivers

Whitepaper By: 
Xilinx

The Virtex-II Proâ„¢ Platform FPGA provides an attractive single-chip solution to serial transceiver design problems that previously required multiple devices.

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