Synopsys

Toshiba Selects Synopsys VC Formal Verification Solution

Submitted by fc on June 19, 2017 - 12:00am

Next-generation Formal Verification Technology Uniquely Positioned for Performance and Capacity Required for Complex SoCs

Tags:

Toshiba Selects Synopsys VC Formal Verification Solution

Submitted by fc on June 19, 2017 - 12:00am

Next-generation Formal Verification Technology Uniquely Positioned for Performance and Capacity Required for Complex SoCs

Tags:

Reduce Dynamic Power and Area up to 50% on a GHz+ MIPS Core Implementation - webinar

Submitted by fc on July 9, 2014 - 1:14am

When:

Jul 10 2014 - 10:00am

Tags:

Synopsys Electrical and Multi-Physics System Saber Seminar - Paris, France

Submitted by fc on October 3, 2013 - 10:36am

When:

Oct 10 2013 - 10:00am

Overview

Tags:

Samsung Widely Deploys Synopsys' Design Compiler Graphical for Mobile SoC Designs

Submitted by fc on September 3, 2013 - 12:00am

Achieves Area and Power Reduction Critical to Success in the Mobile Market

• Broad deployment of Design Compiler Graphical for Samsung Mobile SoCs
• Reduced routing congestion leads to 10 percent smaller area for highly congested blocks
• Minimal use of Low-Vt cells reduces leakage power while meeting frequency goals

Tags:

Synopsys Introduces Dolby MS11 Decoder for DesignWare ARC Audio Processors

Submitted by fc on August 12, 2013 - 12:00am

Support for Dolby Laboratories' Multistream Decoding Expands Portfolio of ARC Audio Codecs

Highlights:

• Dolby MS11 decoder certified by Dolby Laboratories to run on single- and dual-core ARC audio processors
•Supplies full Dolby metadata support and decodes all audio formats required to match global and local broadcast standards including Dolby Digital Plus, Dolby Digital and Dolby Pulse

Tags:

Synopsys and Lattice Semiconductor Extend Multi-Year FPGA Synthesis OEM Agreement

Submitted by fc on August 5, 2013 - 12:00am

Synopsys' Synplify Pro Software Delivers Optimal Logic Synthesis Results for Users of Lattice Semiconductor FPGAs and CPLDs

• Multi-year contract renewal provides Lattice FPGA and CPLD users with Synopsys' technology-leading Synplify Pro logic synthesis tool
• Synplify Pro has been optimized for Lattice Semiconductor devices to deliver optimal Quality of Results (QoR) and fast timing closure

Tags:

Synopsys Launches Ultra-Low Power IP Subsystem for Sensors

Submitted by fc on July 30, 2013 - 12:00am

Synopsys Launches Ultra-Low Power IP Subsystem for Sensors
Configurable Hardware and Software IP Solution Enables Rapid Integration of Sensor Functionality into SoCs

Highlights:
• Integrated, pre-verifie

Tags:

Imagination’s Design Optimisation Kits (DOKs) deliver substantial silicon PPA gains while reducing design cycle times

Submitted by fc on July 24, 2013 - 12:00am

First DOK co-developed with Synopsys reduces dynamic power by up to 25% and area up to 10% for PowerVR Series6 GPUs

Tags:

Synopsys Announces Availability of Complete 28-nm Data Converter IP Portfolio

Submitted by fc on July 17, 2013 - 12:00am

Latest Generation Reduces Power Consumption by up to 76 Percent and Area Use by up to 86 Percent for Mobile Communication SoCs

Highlights:
• Complete portfolio of data converter IP includes high-speed and general-purpose ADCs and DACs
• New successive approximation register architecture for 12-bit ADCs supports conversion rates up to 320 MSPS

Tags:

Check out FPGA related videos

Find Us On Facebook

FPGA Central is a website bringing the FPGA (Field Programable Gate Array), CPLD , PLD, VLSI community together at one central location. Some Keywords: FGPA, FPGA, EDA Tools, FPGA Design, Central, Programmable logic, LUT, VLSI, SoC, Journal

Resources

Stay Updated

Products & Tools

Stay Informed

Community

Stay Connected

Learning Central

Get involved

Synopsys

Toshiba Selects Synopsys VC Formal Verification Solution

Toshiba Selects Synopsys VC Formal Verification Solution

Reduce Dynamic Power and Area up to 50% on a GHz+ MIPS Core Implementation - webinar

Synopsys Electrical and Multi-Physics System Saber Seminar - Paris, France

Samsung Widely Deploys Synopsys' Design Compiler Graphical for Mobile SoC Designs

Synopsys Introduces Dolby MS11 Decoder for DesignWare ARC Audio Processors

Synopsys and Lattice Semiconductor Extend Multi-Year FPGA Synthesis OEM Agreement

Synopsys Launches Ultra-Low Power IP Subsystem for Sensors

Imagination’s Design Optimisation Kits (DOKs) deliver substantial silicon PPA gains while reducing design cycle times

Synopsys Announces Availability of Complete 28-nm Data Converter IP Portfolio

Check out FPGA related videos

Find Us On Facebook

Resources

Products & Tools

Community

Learning Central

About