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Towards Silicon Convergence Altera’s CTO Weighs In on the Future

We have often discussed the many ramifications of Moore’s Law in these pages. Of course, chips continue to get exponentially cheaper, faster, more capable, and more efficient. Also of course, the fixed costs of making a new chip continue to get exponentially higher. If one combines these two trends, one sees that we must be increasingly careful on what chips we choose to make.

Enabling error resilience throughout the embedded system

Decreasing semiconductor device geometries allow ever higher levels of integration in System-on-Chip (SoC) devices. In the domain of FPGAs, this results in very high capacity programmable hardware devices. At 28-nm, the latest trend in FPGAs is to combine FPGA fabric with a high-performance SoC.

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