World's Largest FPGA/CPLD Portal

Design Automation Conference (DAC)

Xilinx Returns to DAC Asking - Why ASIC When You Can Go All Programmable?

Xilinx exhibits for first time since 2002 to mark FPGA transition to All Programmable devices and the introduction of the Vivado Design Suite as a bridge from ASICs

Tags:

Check out FPGA related videos

Xcell Journal Issue 83 Focuses on Xilinx's Zynq-7000 All Programmable SoCs and Vivado HLS for Smarter Embedded Vision Systems
MOS-AK/GSA Munich Workshop Press Note
Xilinx Receives Prestigious 2013 EE Times and EDN ACE Award for the Vivado Design Suite
Altera Announces Availability of Cyclone V SoC Development Kit
Xilinx Highlights Smarter Vision Solutions at the Embedded Vision Alliance Summit and DESIGN West 2013

FPGA Central is a website bringing the FPGA (Field Programable Gate Array), CPLD , PLD, VLSI community together at one central location. Some Keywords: FGPA, FPGA, EDA Tools, FPGA Design, Central, Programmable logic, LUT, VLSI, SoC, Journal

Resources

Stay Updated

Products & Tools

Stay Informed

Community

Stay Connected

Learning Central

Get involved