Planet FPGA
Take A Poll
FPGA newsgroup
FPSC - Field Programmable System Chip
Lattice Semiconductor was introduced Field Programmable System Chip (FPSC), where ASIC macrocell and FPGA gates were in same silicon die. FPSC combines a regular array of SRAM based FPGA programmable function units (PFUs) and an ASIC area. An interface block allows the transfer of data and clocks between the two circuit types. An additional feature is the ability to “program” the ASIC area using RAM bits in the FPGA bit stream that are set aside for this purpose providing the user added flexibility. The embedded macrocells hold industry-standard Intellectual Property - bus interface, high-speed line interface, and high-speed transceiver cores. When these macrocells are combined with hundreds of thousands of programmable gates they can be used in a variety of advanced system designs.
FPGA Webcasts
Upcoming FPGA Events
- IET & GSA International Semiconductor Forum London, U.K.(Event or Conference)(1 day)
- High-Speed Interconnects - San Jose,Ca(Event or Conference)(1 day)
- 11th Embedded Systems Expo (ESEC) - Tokyo, Japan(Event or Conference)(1 day)
- 7 Habits of Successful FPGA Design Workshop - San Jose, CA(Event or Conference)(8 days)
Forums | IP Catalog | Development Board | Vendor Directory | Products | FPGA Conference | Events | Polls | News | User Blogs | FPGA Jobs USA | FPGA Jobs Portal USA| FPGA Articles | PLD Types
