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As the technology surrounding programmable devices improved, new devices were developed which combined several PLDs together on a single integrated circuit to form complex programmable logic devices,

EPLD devices are erasable programming devices introduced by Altera offer high density and buried registers.

Field programmable analog array (FPAA) based on switched capacitor circuits operating with operational amplifiers and numerous switches incorporate many classes (subsystems) of interconnections.

At the beginning of 1980, there were programmable logic devices, which had fast design, highly configurable and reprogrammable, but they were support only small functions.

Field programmable object array was introduced by Mathstar. FPOA is a field programmable device in the form of a two-dimensional array of Silicon Objects (SOs).

Lattice Semiconductor was introduced Field Programmable System Chip (FPSC), where ASIC macrocell and FPGA gates were in same silicon die.

Generic array logic was introduced by lattice semiconductor Co. in 1983. GAL offered CMOS electrically erasable PROM (EPROM, E2PROM) variations on the PAL concept.

Mask-Programmable Gate Array (MPGA) was developed to handle larger logic circuits.

PALs were introduced in late 1970 to address speed problem shown by PLA devices. A PAL is opposite to PROM, where AND array is programmable but OR array is fixed.

PLAs became available in 1975 to address the limitations imposed by the PROM architecture, where both planes AND and OR arrays were programmable.

The first PLD is PROM was introduced in 1970. PROMs was introduced for use as computer memories in which to store program instructions and constant data values.

There was a large gap existing between standard cell-based design and FPGA, even when FPGA was introduced to overcome the gap.