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tPad Embedded System: the 2048 game + Draw Picture

Distributed Feeds - April 10, 2014 - 10:11pm

This time, we had an advanced version of FPGA project (comparing to Color Piano), which involving touch panel, gravity sensor and VGA screen.  It was also an embedded system design, that could had more functions and more adaptivity  than implying the hardware alone.

The system was first designed with only the “start” screen and the “touch-draw” function last year. Then we added the fun game “2048″, to make it more fun.

  • The old tPad project.

We had this tPad project one year ago in the advance VLSI design class. The we tried embedded system for the following reasons:

  1. We could have software in the project, like programming in C, other than Verilog alone.
  2. The hardware design could be separated with the software function.
  3. Highly adaptivity and easier to add more functions.

We started building the hardware frame by using SPOC builder from the Quartus II. Adding the CPU, JTAG, CFI Flash, SDRAM, PLL, ADXL345, I2C and the LCD screen and other components.

Then we added a Power Manage Unit in the hardware to realize the function of “saving power”, which was turning off the screen if the screen was not touched for 10 seconds (we made it 3 seconds in the video demonstration).

Luckily the Altera had provided the drivers for all the hardware components, and we could directly use those drivers.

We realized the “draw” function by collecting the dots that we touched on the screen. And you could choose different colors and clear the previous screen. You could also clear the screen by shaking it.

The glitches in the video are caused by 2 major reasons: 1. The screen is a resistive touch screen, it is less accurate than the capacitance touch screen. 2. We lowered the frequency of getting the position of dots. So when I moved quickly on the screen, the dots were more “discrete”

  • The 2048 game

This presentation was the 2048 game alone.

When we were wrapping the previous projects, the fun game 2048 (http://gabrielecirulli.github.io/2048/ ) was launched,  and we started the idea of making it into out tPad system.  We chose the gravity sensor as the input instead of  arrow keys. You could also choose to restart the game by touch the “Clear” button.

  • Integrated Together

From this “integrated” system that we can choose which the sub program to run and return to the start menu, as the video in the beginning.

Categories: Planet FPGA

CPLD Tutorial: Learn Programmable Logic the Easy Way

Distributed Feeds - April 6, 2014 - 4:01am

739px-Altera_MAX_7128_2500_gate_CPLD

The guys over at hackshed have been busy. [Carl] is making programmable logic design easy with an 8 part CPLD tutorial. Programmable logic devices are one of the most versatile hardware building blocks available to hackers. They also can have a steep learning curve. Cheap Field Programmable Gate Arrays (FPGA) are plentiful, but can have intricate power requirements. Most modern programmable logic designs are created in a Hardware Description Language (HDL) such as VHDL or Verilog. Now you’ve got a new type of device, a new language, an entirely new programming paradigm, and a complex IDE to learn all at once. It’s no wonder FPGAs have sent more than one beginner running for the hills.

The tutorial cuts the learning curve down in several ways. [Carl] is using Complex Programmable Logic Devices (CPLD). At the 40,000 foot level, CPLDs and FPGAs do the same thing – they act as re-configurable logic. FPGAs generally do not store their configuration – it has to be loaded from an external FLASH, EEPROM, or connected processor. CPLDs do store their configuration, so they’re ready as soon as they power up. As a general rule, FPGAs contain more configurable logic than CPLDs. This allows for larger designs to be instantiated with FPGAs. Don’t knock CPLDs though. CPLDs have plenty of room for big designs, like generating VGA signals.

[Carl] also is designing with schematic capture in his tutorial. With the schematic capture method, digital logic schematics are drawn just as they would be in Eagle or KiCad. This is generally considered an “old school” method of design capture. A few lines of VHDL or Verilog code can replace some rather complex schematics. [Carl's] simple designs don’t need that sort of power though. Going the schematic capture route eliminates the need to learn VHDL or Verilog.

[Carl's] tutorial starts with installing Altera’s Quartus II software. He then takes the student through the “hardware hello world” – blinking an LED.  By the time the tutorial is done, the user will learn how to create a 4 bit adder and a 4 bit subtractor. With all that under your belt, you’re ready to jump into big designs – like building a retrocomputer.

[Image via Wikimedia Commons]

Categories: Planet FPGA

Color Piano

Distributed Feeds - April 3, 2014 - 9:54pm

Color Piano is a FPGA board project that can recognize different color and play the sound through camera input. Our piano dose not have the ordinary keyboard as input, instead we decide to use camera as the input to get the signal of different colors. This Color Piano can play 7 different notes (from middle C to B), with corresponding green LED lights indicate the notes, and red LED lights for the RGB value of every pixel (approximately). This project can be the prototype of some projects that has more function as an electronic keyboard instrument like recording, beat generation and mix.

My partner and I designed a FPGA system on an Altera’s DE2-70 board with Cyclone II 2C70 FPGA and 5 megapixel resolution TRBD_D5M camera as input, led lights and headphone as outputs.

Using Quartus II to synthesis Verilog code and build the system that could recognize different colors through the on board real-time camera input and play corresponding sounds through a headphone that was linked to an IO pin generates the sound frequency signal.

Here is a figure for the normalization of the image signal.Screen Shot 2014-04-03 at 1.52.30 PM

 

Feel free to leave any comments or contact me: [email protected]

 

Categories: Planet FPGA

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