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Almost every electronics now have SMD parts on it. Hobbyist sector is no exception. Sometimes parts only come in SMT packages and there is no way to avoid. If you need to solder few of them, maybe you can get away with soldering iron and a bit patience. But for larger batches maybe it is better to use reflow soldering technique. This is nothing more than baking circuits in oven. One thing is important here – temperature and timing. Instead of doing this manually, better leave this process to control circuit.
Hamster though it would be fun project to make an oven controlled by FPGA. He programmed temperature stages as finite state machine. Temperature is monitored by using thermocouple. Heater element is switched on/off with solid state relay. The other part of electronics is less critical like LED display, RS232 logging. As initial tests showed, good oven isn’t enough. Proper paste dispenser is also critical for smooth solder joints. But with some practice or by simply using stencils results sould be much better.
A few weeks ago, I have been pleased to attend IECON2013 in Vienna and had the chance to meet my friend Luis Gomes from the University Nova of Lisboa, Portugal. While discussing together, he took some time to give me some details about a web-based framework that he designed with his team. This framework is called “IOPT-Tools” and this is a on-line Petri Net editor. Petri nets are useful to modelize any type of process and are used in many different applications (e.g. workflow management or UAV fault diagnostics).
What’s cool about this tool (other than being web-based, i.e. not having to install it on your desktop computer) is that once your have modelized your system, you can run all sorts of analysis to validate system behavior and even automatically generate VHDL code or C code to embed your model inside a controller. Here is a screen shot of a model used for BLDC motor commutation:
This tool in totally in line with current discussions in the EDA community regarding the migration of EDA tools in the cloud (see Cadence blog or Synopsis blog on this). EDA in the cloud in the idea of having tools for chip/embedded system design being offered as Software-As-a-Service (SaaS) and running on powerful servers so that even small teams could leverage important computing power they could not afford otherwise. With the rising complexity of chip design, it is well known that always more computing power is needed to compile designs and the solution won’t come from the standard computing solutions.
Congrats to the team of Dr. Gomes for their vision in developping this new tool ! You can access it and use it right now for FREE by following this link.
For more information regarding this tool, you can also consult some publications on the IEEE Explore. If somehow you use this tool and want to publish an article at the next IEEE IES IECON2014 conference in Dallas, TX, watch for the Call for Paper here.
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