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CPLD and FPGA are different from microcontroller concept. Instead of writing programs here you need to configure hardware. With modern tools and programming languages like VHDL or Verilog things are much easier. Pyroelectro has started a series of tutorials where you will lean the very basics of building your own projects with CPLD and so with FPGA. This one is dedicated to turning LED on and off.
There are a list of courses to come where you will learn more advanced topics that will allow to feel the benefit of using CPLD over microcontrollers.
"Want to learn about FPGA and CPLD? Please start here! This lesson explains the course content, what expectations you should have and what parts are needed for the course."
This online course is also be available through:
uReddit – P2PU
“This course is meant to create a pathway into learning about FPGA and CPLD electronics, for people who are scared of the code, tools and general trickery that usually comes with it. A hands-on approach is taken in this course through a combination of lecture and experimentation to teach you about the different features of both the development tools and languages used in the world of FPGA. Additionally, visuals are used throughout lectures like step-by-step schematic building and line-by-line code explanations so that everything gets explained.”
This course comes right on the heels of An Introduction To Microcontrollers and as such, it will use knowledge from that course to further expand to the world of programmed logic and hardware. Also, thanks again to all of our kickstarter backers who originally got us started! Read more at the course page at PyroEDU This online course will also be available through:
uReddit – P2PU
So, study over and I was wondering …
So, the HIVE code sucks up into Quartus 10.1 fine (it appears to have been written for 9.x).
The problem … needs a bigger FPGA chip than our EP2C5T144C8 chip. I have a board with EP2C8T208C8 coming but, alas that is too small too (there are no EP2C70xxxxx boards on Aliexpress in any event).
Looks like you have to invest in Cyclone III and above. Not an option at the moment till we spend about 12 months learning the art of FPGA I think.
I have a Mojo board with a Xilinx Spartan 6 on board so I jump onto my Xilinx tools (which I haven’t used yet ;) ) and loaded up J1 and dang thing wouldn’t build so that will need some work – I guess its a good way to learn the environment. Oddly, it seems to come up in the simulator so it seems to compile fine, just fails layout.
So, I might spend a little time with the simulator manual and pour over the model every now and then to work out the tool and check out the cpu that way.